Overall Board Thickness
Individual Laminate Thickness
- Prepreg thicknesses from the laminate manufacturer range from ± 0.3-0.5 mils
- Prepreg is partially-cured material and will flow & fill into etched Cu areas during lamination. Thickness after the prepreg flows is largely design-dependent and hard for the factory to control
- Prepreg openings should have larger tolerances than cores of comparable thicknesses or follow IPC 6012C 22.214.171.124 minimum’s after processing [ 3.5 mils min or 1 mil min when starting dielectrics are < 3.5 mils]
Board Outline Dimensions
- Machine runout tolerance 0.7 mils
- Rout cutter deflection
- Material Movement (mfg panel tooling holes are drilled at primary drill; board outline created with a secondary drill process)
- Typical board outline tolerance is ± .008”
- Min board outline capability is ± .005”
Soldermask and Plating
Internal Layers [Non-plated]: Specify starting foil weight. Finished thickness shall be per IPC-6012C table 3-11.
External layers [Also applies to plated internal layers]: Specify EITHER the starting foil weight or finished copper weight (or thickness).
Most PCB fab houses prefer the finished Cu thickness (or weight) to be specified. Finished thickness shall be per IPC-6012C table 3-12.
- X/Y material movement (typically ± .003” layer to layer)
- Drill machine accuracy (almost .001”)
- Drill deflection ( .001” - .002”)
Average registration capability is .005”. Typical minimum designed annular ring for a finished annular ring of tangency is .005” per side (pad diameter .010” over the drill* size).*Remember vias are drilled at the FHS due to designed pad size and plated PTH are drilled ~ .005” over the FHS. Component hole pads need to be larger to accommodate the larger drill size.
Typically all holes are drilled at the same time as the datum (primary drill) but there are certain cases where holes need to be drilled at a secondary drill process:
- Hole size too large (routed)
- NPTH size too large to tent the hole during plating processes
- NPTH in a plated pad
- Standard impedance tolerance is 10% (± 5Ω on a typical 50Ω target)
- For impedance targets < 50Ω SE, the % tolerance needs to increase to maintain ± 5Ω (Example 28Ω, 40Ω & 45Ω targets typically need a ± 5Ω target)
- Tighter tolerances (8% or 5%) may be achievable with an impact to yield/cost
- Larger surface RF traces (avg 18-20 mils wide) can usually be spec’d less than 10% without an impact to yield
Other Mechanical Features
- Don’t mix units of measure on a fab drawing
- Check mechanical features to ensure no critical dimensions are missing
- If a measurement is not critical, either remove the dimension, place in parenthesis, or note as “TYP”